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| d a t a sh eet product speci?cation file under integrated circuits, ic06 1999 jun 16 integrated circuits 74ahc574; 74ahct574 octal d-type flip-flop; positive edge-trigger; 3-state
1999 jun 16 2 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 features 3-state non-inverting outputs for bus oriented applications 8-bit positive, edge-triggered register esd protection: hbm eia/jesd22-a114-a exceeds 2000 v mm eia/jesd22-a115-a exceeds 200 v independent register and 3-state buffer operation common 3-state output enable input output capability; bus driver i cc category: msi for ahc only: operates with cmos input levels for ahct only: operates with ttl input levels specified from - 40 to +85 and +125 c. description the 74ahc/ahct574 are high-speed si-gate cmos devices and are pin compatible with low power schottky ttl (lsttl). they are specified in compliance with jedec standard no. 7a. the 74ahc/ahct574 are octal d-type flip-flops featuring separate d-type inputs for each flip-flop and 3-state outputs for bus oriented applications. a clock (cp) and an output enable ( oe) input are common to all flip-flops. the 8 flip-flops will store the state of their individual d-inputs that meet the set-up and hold times requirements on the low-to-high cp transition. when oe is low the contents of the 8 flip-flops are available at the outputs. when oe is high, the outputs go to the high-impedance off-state. operation of the oe input does not affect the state of the flip-flops. the 574 is functionally identical to the 564, but has non-inverting outputs. the 574 is functionally identical to the 374, but has a different pinning. quick reference data gnd = 0 v; t amb =25 c; t r =t f 3.0 ns. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i + ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; ? (c l v cc 2 f o ) = sum of outputs; c l = output load capacitance in pf; v cc = supply voltage in volts. 2. the condition is v i = gnd to v cc . symbol parameter conditions typical unit ahc ahct t phl /t plh propagation delay c l = 15 pf; v cc = 5 v 4.4 4.4 ns cp to q n f max maximum clock frequency c l = 15 pf; v cc = 5 v 130 130 mhz c i input capacitance v i =v cc or gnd 4.0 4.0 pf c o output capacitance 4.0 4.0 pf c pd power dissipation capacitance c l = 50 pf; f = 1 mhz; notes 1 and 2 10 12 pf 1999 jun 16 3 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 function table see note 1. note 1. h = high voltage level; h = high voltage level one set-up time prior to the low-to-high cp transition; l = low voltage level; i = low voltage level one set-up time prior to the low-to-high cp transition; z = high-impedance off-state; - = low-to-high cp transition. ordering information pinning operating modes inputs internal flip-flops outputs oe cp d n q 0 to q 7 load and read register l - il l l - hh h load register and disable outputs h - ll z h - hh z outside north america north america packages pins package material code 74ahc574d 74ahc574d 20 so plastic sot163-1 74AHC574PW 74AHC574PW dh 20 tssop plastic sot360-1 74ahct574d 74ahct574d 20 so plastic sot163-1 74ahct574pw 74ahct574pw dh 20 tssop plastic sot360-1 pin symbol description 1 oe 3-state output enable input (active low) 2, 3, 4, 5, 6, 7, 8 and 9 d 0 to d 7 data inputs 10 gnd ground (0 v) 11 cp clock input (low-to-high, edge triggered) 19, 18, 17, 16, 15, 14, 13 and 12 q 0 to q 7 3-state ?ip-?op outputs 20 v cc dc supply voltage 1999 jun 16 4 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 fig.1 pin configuration. handbook, halfpage oe d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 gnd v cc q 0 q 1 q 2 q 4 q 5 q 3 q 6 q 7 cp 1 2 3 4 5 6 7 8 9 10 11 12 20 19 18 17 16 15 14 13 574 mna444 fig.2 logic symbol. handbook, halfpage mna445 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 oe cp q 0 q 1 q 2 q 3 q 4 q 5 q 6 q 7 11 1 12 13 14 15 16 17 18 19 9 8 7 6 5 4 3 2 fig.3 iec logic symbol. handbook, halfpage mna446 12 13 14 15 16 17 18 11 c1 1 en 1d 19 9 8 7 6 5 4 3 2 fig.4 functional diagram. handbook, halfpage mna447 3-state outputs q 0 q 1 q 2 q 3 q 4 q 5 q 6 q 7 ff1 to ff8 12 13 14 15 16 17 18 19 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 cp oe 9 11 1 8 7 6 5 4 3 2 1999 jun 16 5 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... handbook, full pagewidth mna449 q 4 d 4 q 3 d 3 q 2 d 2 q 1 d 1 q 0 d 0 d cp ff1 q cp d ff2 q dq dq dq dq dq dq oe q 5 d 5 q 6 d 6 q 7 d 7 cp ff3 cp ff4 cp ff5 cp ff6 cp ff7 cp ff8 cp fig.5 logic diagram. 1999 jun 16 6 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 134); voltages are referenced to gnd (ground = 0 v). notes 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. for so-packages: above 70 c the value of p d derates linearly with 8 mw/k. for tssop-packages: above 60 c the value of p d derates linearly with 5.5 mw/k. symbol parameter conditions 74ahc 74ahct unit min. typ. max. min. typ. max. v cc dc supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 v v i input voltage 0 - 5.5 0 - 5.5 v v o output voltage 0 - v cc 0 - v cc v t amb operating ambient temperature range see dc and ac characteristics per device - 40 +25 +85 - 40 +25 +85 c - 40 +25 +125 - 40 +25 +125 c t r ,t f ( d t/ d f) input rise and fall times except for schmitt-trigger inputs v cc = 3.3 v 0.3 v -- 100 --- ns/v v cc =5v 0.5 v -- 20 -- 20 ns/v symbol parameter conditions min. max. unit v cc dc supply voltage - 0.5 +7.0 v v i input voltage range - 0.5 +7.0 v i ik dc input diode current v i < - 0.5 v; note 1 -- 20 ma i ok dc output diode current v o < - 0.5 v or v o >v cc + 0.5 v; note 1 - 20 ma i o dc output source or sink current - 0.5v 1999 jun 16 8 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 family 74ahct over recommended operating conditions; voltage are referenced to gnd (ground = 0 v). symbol parameter test conditions t amb ( c) unit other v cc (v) +25 - 40 to +85 - 40 to +125 min. typ. max. min. max. min. max. v ih high-level input voltage 4.5 to 5.5 2.0 -- 2.0 - 2.0 - v v il low-level input voltage 4.5 to 5.5 -- 0.8 - 0.8 - 0.8 v v oh high-level output voltage; all outputs v i =v ih or v il ; i o = - 50 m a 4.5 4.4 4.5 - 4.4 - 4.4 - v high-level output voltage v i =v ih or v il ; i o = - 8.0 ma 4.5 3.94 -- 3.8 - 3.70 - v v ol low-level output voltage; all outputs v i =v ih or v il ; i o =50 m a 4.5 - 0 0.1 - 0.1 - 0.1 v low-level output voltage v i =v ih or v il ; i o = 8.0 ma 4.5 -- 0.36 - 0.44 - 0.55 v i i input leakage current v i =v ih or v il 5.5 -- 0.1 - 1.0 - 2.0 m a i oz 3-state output off current v i =v ih or v il ; v o =v cc or gnd per input pin; other inputs at v cc or gnd; i o =0 5.5 -- 0.25 - 2.5 - 10.0 m a i cc quiescent supply current v i =v cc or gnd; i o =0 5.5 -- 4.0 - 40 - 80 m a d i cc additional quiescent supply current per input pin v i =v cc - 2.1 v other inputs at v cc or gnd; i o =0 4.5 to 5.5 -- 1.35 - 1.5 - 1.5 ma c i input capacitance -- 310 - 10 - 10 pf 1999 jun 16 9 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 ac characteristics type 74ahc574 gnd = 0 v; t r =t f 3.0 ns. symbol parameter test conditions t amb ( c) unit waveforms c l v cc (v) +25 - 40 to +85 - 40 to +125 min. typ. max. min. max. min. max. t phl /t plh propagation delay cp to q n see figs 6, 8 and 9 15 pf 3.0 to 3.6 - 6.5 (1) 13.2 1.0 15.5 1.0 16.5 ns t pzh /t pzl 3-state output enable time oe to q n see figs 7 and 9 - 5.7 (1) 12.8 1.0 15.0 1.0 16.0 ns t phz /t plz 3-state output disable time oe to q n - 6.3 (1) 13.0 1.0 15.0 1.0 16.5 ns t phl /t plh propagation delay cp to q n see figs 6, 8 and 9 50 pf - 9.3 (1) 16.7 1.0 19.0 1.0 21.0 ns t pzh /t pzl 3-state output enable time oe to q n see figs 7 and 9 - 8.2 (1) 16.3 1.0 18.5 1.0 20.5 ns t phz /t plz 3-state output disable time oe to q n - 9.1 (1) 15.0 1.0 17.0 1.0 19.0 ns t phl /t plh propagation delay cp to q n see figs 6, 8 and 9 15 pf 4.5 to 5.5 - 4.4 (2) 8.6 1.0 10.0 1.0 11.0 ns t pzh /t pzl 3-state output enable time oe to q n see figs 7 and 9 - 4.2 (2) 9.0 1.0 10.5 1.0 11.5 ns t phz /t plz 3-state output disable time oe to q n - 4.3 (2) 9.0 1.0 10.5 1.0 11.5 ns t phl /t plh propagation delay cp to q n see figs 6, 8 and 9 50 pf - 6.2 (2) 10.6 1.0 12.0 1.0 13.5 ns t pzh /t pzl 3-state output enable time oe to q n see figs 7 and 9 - 5.9 (2) 11.0 1.0 12.5 1.0 14.0 ns t phz /t plz 3-state output disable time oe to q n - 6.9 (2) 10.1 1.0 11.5 1.0 13.0 ns 1999 jun 16 10 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 notes 1. typical values at v cc = 3.3 v. 2. typical values at v cc = 5.0 v. t w clock pulse width high or low see figs 6 and 9 50 pf 3.0 to 3.6 5.0 -- 5.0 - 5.0 - ns t su setup time d n to cp see figs 8 and 9 3.5 -- 3.5 - 3.5 - ns t h hold time d n to cp 1.5 -- 1.5 - 1.5 - ns f max maximum clock pulse frequency see figs 6 and 9 50 75 - 45 - 45 - mhz 15 pf 80 125 - 65 - 65 - mhz t w clock pulse width high or low see figs 6 and 9 50 pf 4.5 to 5.5 5.0 -- 5.0 - 5.0 - ns t su setup time d n to cp see figs 8 and 9 3.0 -- 3.0 - 3.0 - ns t h hold time d n to cp 1.5 -- 1.5 - 1.5 - ns f max maximum clock pulse frequency see figs 6 and 9 85 115 - 75 - 75 - mhz 15 pf 130 180 - 110 - 110 - mhz symbol parameter test conditions t amb ( c) unit waveforms c l v cc (v) +25 - 40 to +85 - 40 to +125 min. typ. max. min. max. min. max. 1999 jun 16 11 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 type 74ahct574 gnd = 0 v; t r =t f 3.0 ns. note 1. typical values at v cc = 5.0 v. symbol parameter test conditions t amb ( c) unit waveforms c l v cc (v) +25 - 40 to +85 - 40 to +125 min. typ. max. min. max. min. max. t phl /t plh propagation delay cp to q n see figs 6 and 9 15 pf 4.5 to 5.5 - 4.4 (1) 8.6 1.0 10.0 1.0 11.0 ns t pzh /t pzl 3-state output enable time oe to q n see figs 7 and 9 - 4.3 (1) 9.0 1.0 10.5 1.0 11.5 ns t phz /t plz 3-state output disable time oe to q n - 4.3 (1) 9.0 1.0 10.5 1.0 11.5 ns t phl /t plh propagation delay cp to q n see figs 6 and 9 50 pf - 6.3 (1) 10.6 1.0 12.0 1.0 13.5 ns t pzh /t pzl 3-state output enable time oe to q n see figs 7 and 9 - 6.1 (1) 11.0 1.0 12.5 1.0 14.0 ns t phz /t plz 3-state output disable time oe to q n - 6.2 (1) 10.1 1.0 11.5 1.0 13.0 ns t w clock pulse width high or low see figs 6 and 9 5.0 -- 5.5 - 5.5 - ns t su setup time d n to cp see figs 8 and 9 3.0 -- 3.5 - 3.5 - ns t h hold time d n to cp 1.5 -- 1.5 - 1.5 - ns f max maximum clock pulse frequency see figs 6 and 9 85 115 - 75 - 75 - mhz 15 pf 130 180 - 110 - 110 - mhz 1999 jun 16 12 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 ac waveforms fig.6 the clock (cp) to output (q n ) propagation delays. handbook, full pagewidth mna200 t phl t plh t w 1/f max v m (1) v m (1) cp input q n output gnd v i family v i input requirements v m input v m output ahc gnd to v cc 50% v cc 50% v cc ahct gnd to 3.0 v 1.5 v 50% v cc fig.7 the 3-state enable and disable times. family v i input requirements v m input v m output ahc gnd to v cc 50% v cc 50% v cc ahct gnd to 3.0 v 1.5 v 50% v cc handbook, full pagewidth mna450 t plz t phz outputs disabled outputs enabled v oh - 0.3 v v ol + 0.3 v outputs enabled output low-to-off off-to-low output high-to-off off-to-high oe input v i v cc v m (1) v ol v oh gnd gnd t pzl t pzh v m v m 1999 jun 16 13 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 fig.8 the data set-up and hold times for d n input. the shaded areas indicate when the input is permitted to change for predicable output performance. family v i input requirements v m input v m output ahc gnd to v cc 50% v cc 50% v cc ahct gnd to 3.0 v 1.5 v 50% v cc handbook, full pagewidth mna448 gnd gnd t h t su t h t su v m (1) v m (1) v i v i cp input d n input fig.9 load circuitry for switching times. handbook, full pagewidth open gnd v cc v cc v i v o mna183 d.u.t. c l r t 1000 w pulse generator s 1 test s 1 t plh /t phl open t plz /t pzl v cc t phz /t pzh gnd family v i input requirements v m input v m output ahc gnd to v cc 50% v cc 50% v cc ahct gnd to 3.0 v 1.5 v 50% v cc 1999 jun 16 14 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 package outlines unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot163-1 10 20 w m b p detail x z e 11 1 d y 0.25 075e04 ms-013ac pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.51 0.49 0.30 0.29 0.050 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 0 5 10 mm scale x q a a 1 a 2 h e l p q e c l v m a (a ) 3 a so20: plastic small outline package; 20 leads; body width 7.5 mm sot163-1 95-01-24 97-05-22 1999 jun 16 15 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.5 0.2 8 0 o o 0.13 0.1 0.2 1.0 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot360-1 mo-153ac 93-06-16 95-02-04 w m b p d z e 0.25 110 20 11 pin 1 index q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1 a max. 1.10 1999 jun 16 16 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c. 1999 jun 16 17 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. package soldering method wave reflow (1) bga, sqfp not suitable suitable hlqfp, hsqfp, hsop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. 1999 jun 16 18 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 notes 1999 jun 16 19 philips semiconductors product speci?cation octal d-type ?ip-?op; positive edge-trigger; 3-state 74ahc574; 74ahct574 notes ? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 1999 66 philips semiconductors C a worldwide company netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 58088 newville 2114, tel. +27 11 471 5401, fax. +27 11 471 5398 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2886, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: yukari dudullu, org. san. blg., 2.cad. nr. 28 81260 umraniye, istanbul, tel. +90 216 522 1500, fax. +90 216 522 1813 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 208 730 5000, fax. +44 208 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 62 5344, fax.+381 11 63 5777 for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 02 67 52 2531, fax. +39 02 67 52 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5057 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 middle east: see italy printed in the netherlands 245002/01/pp20 date of release: 1999 jun 16 document order number: 9397 750 06027 |
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